While Time Tagger 20 and Time Tagger Ultra exclusively have a USB interface, Time Tagger X also features a QSFP+ interface, which allows users to output signals to a secondary FPGA at a high data rate (up to 1.2 GTags/s) and low latency. The latter refers to the time required to transfer the time tags through the QSFP+ interface and make them available in the second FPGA. As an Ethernet protocol is used, the latency for receiving the time tags in the second FPGA is approximately 10 µs.
Please note that the Time Tagger X FPGA output is compatible with the Opal Kelly XEM 8320 FPGA board. To simplify the development process for this second FPGA, we provide basic FPGA software, which can be customized according to your needs. Please have a look at the in-depth guide on the FPGA in our documentation. A Reference Design Guide can be found in the GitHub Repository.