Photonic Integrated Circuits (PIC)
Introduction to Photonic Integrated Circuits and Time Tagging Electronics
Photonic Integrated Circuits (PICs) are chip-scale devices that integrate or co-package optical components such as lasers, modulators, waveguides, and detectors on a single substrate or within a common package. They provide a scalable, miniaturized platform for high-speed optical communication, quantum photonic technology, and biosensing applications across silicon photonics (Si), silicon nitride (SiN), and indium phosphide (InP) platforms.
In the broader context, photonic integrated circuits are emerging as a cornerstone for short-reach data centers and chip-to-chip interconnects, telecom networks, quantum communication, and sensing. They offer substantial benefits in size, stability, cost, and reproducibility over bulk optics, enabling wafer-level, high-volume manufacturing.
PICs directly address key limitations of today’s electronic systems. They increase data throughput, enabling multi-terabit-per-second links and have low-latency, high-bandwidth interconnects that outpace copper 1. For example, in Light Detection and Ranging (LiDAR), PICs can implement solid-state optical phased arrays, enabling on-chip beam steering and eliminating moving parts, bulk, and cost in suitable architectures 2.
From early integrated-optics experiments to modern silicon photonics, PICs have evolved over decades, with milestones such as arrayed-waveguide gratings and dense wavelength-division multiplexing 3. In recent years, photonic integrated circuits have expanded beyond telecom into co-packaged optics for AI accelerators and chip-to-chip links 4.
Packaging and testing are critical in PIC development and manufacturing. Advances in fiber arrays, spot-size converters (inverse tapers/mode transformers), and micro-optics reduce insertion loss and relax alignment tolerances. Feedback-controlled alignment accelerates first-signal acquisition and stabilizes coupling from wafer probe to final package. In quantum photonics and ultrafast applications, precise, low-jitter timing is critical. Essential measurements range from time correlated single-photon counting (TCSPC), lifetimes, and multi-photon coincidences to g(2) correlation and Hong–Ou–Mandel (HOM) interference tests on chip and latency/jitter characterization of high-speed modulators and receivers. These requirements highlight the central role of time-tagging electronics discussed below.
Timing electronics required for Photonic Integrated Circuits
A typical Photonic Integrated Circuit (PIC) test bench is shown in Fig.1. It routes the electrical outputs from on-chip or co-packaged detectors, such as Single-Photon Avalanche Diodes (SPADs), Superconducting Nanowire Single-Photon Detectors (SNSPDs), or fast photodiodes, into a multi-channel time-to-digital converter (TDC). In parallel, external markers such as laser triggers, clock references, and scan or step signals are also captured. A shared internal clock ensures multi-channel timing, and digital I/O lines coordinate modulator drive patterns, detector gating, optical-switch triggers, and probe-card relays so acquisition and control stay aligned. On this foundation, the timing electronics support several key measurement types. They provide time-correlated single-photon counting and coincidence analysis for lifetimes, g(2) correlation, Hong–Ou–Mandel (HOM) interference, and other on-chip tests. They also enable latency and jitter characterization of high-speed modulators and receivers. Finally, they allow multi-channel synchronization for interferometric or phase-referenced circuits such as Mach–Zehnder interferometers, arrayed waveguide gratings, and quantum gates. To preserve device-level fidelity, picosecond-class timestamping with low additive jitter, calibrated linearity and thermal stability, and known inter-channel skew are essential, together with continuous, lossless streaming that supports live histograms, coincidences, and logging. With these elements in place, events from multiple optical paths can be correlated reliably and compared across sweeps, temperatures, or bias points, and the same synchronized workflow scales smoothly from first-light wafer probe to high-throughput package-level testing.
Testing photonic integrated circuits requires timing electronics that combine precision, scalability, and flexibility. In practice, several challenges arise, each tied to concrete performance requirements for reliable and efficient measurements:
Picosecond resolution and low jitter: Many PIC measurements, such as photon arrival timing, interferometric phase stability measurement, and latency/jitter characterization, demand sub-10 ps resolution. Excessive jitter or insufficient precision can drastically affect these results.
Scalable, equivalent channels: Experiments frequently involve multiple detectors or optical paths. Channel configurations with rigid architectures, such as fixed start–stop channels where certain inputs are permanently assigned, cannot keep pace with evolving PIC designs. Instead, 8 to more than 32 fully equivalent, independently triggerable channels are required for flexible, synchronized measurements.
High-throughput, low-latency data handling: Conventional systems often suffer from photon-transfer delays, leading to missed or misaligned photon arrivals and triggers. Efficient, low-latency streaming ensures accurate and lossless correlation across detectors and channels.
Minimizing probing overhead: Manual reconnections during wafer-level or high-density testing slow down R&D cycles and introduce errors. Compatibility with fiber arrays, optical switches, and automated routing is essential to support high-throughput workflows.
Real-time data processing: Offline-only analysis slows experimental feedback and complicates iterative testing. On-the-fly computation of histograms, coincidences, and correlations enables faster optimization and deeper insight during acquisition.
Precise synchronization across channels: PIC experiments involving multi-path interference or quantum circuits require tightly aligned timing across all inputs and outputs. Stable inter-channel skew and scalable synchronization are fundamental for reliable, phase-stable measurements.
Swabian Instruments’ Time Tagger - Advanced solution for PIC Testing
Swabian Instruments’ Time Tagger provides the precision, scalability, and flexibility needed for photonic integrated circuit testing and quantum photonics research. Their combination of picosecond precision, scalable channels, and real-time data processing provides unmatched performance and flexibility in PIC development and characterization.
In automated test setups such as SIRIUS 5, Time Tagger modules can be seamlessly integrated via fiber-based triggers or photon-detection modules to assess real-time photon arrival times and loss channels. This versatility makes them a powerful tool for both research and production workflows in the PIC domain.
By integrating Swabian Instruments Time Taggers into a photonic integrated circuits testing setup, researchers can accelerate R&D by replacing direct probing with real-time feedback, scale test complexity without additional hardware, improve coupling efficiency by directly correlating alignment with photon arrivals, and run inline quality-control checks in manufacturing workflows using time-tag-based decision logic.
J. Elliott, “Photonic Integrated Circuit (PIC): The Future of High-Speed Data Processing.” [Online]. ↩︎
“Meint Smit Named 2022 John Tyndall Award Recipient.” [Online]. ↩︎
S. Daudlin et al., “Three-dimensional photonic integration for ultra-low-energy, high-bandwidth interchip data links,” Nat. Photonics, vol. 19, no. 5, pp. 502–509, May 2025, doi: 10.1038/s41566-025-01633-0. ↩︎
R. KELDER, “PIC Testing on Wafer Level,” DSPE Mikroniek, vol. 1, no. 2025, pp. 19–25. ↩︎